A dynamic partial reconfiguration design flow for permanent faults mitigation in FPGAs-Reference-Cited by-同舟云学术

A dynamic partial reconfiguration design flow for permanent faults mitigation in FPGAs

Published:2018-04 Issue: Volume:83 Page:50-63
ISSN:0026-2714
Container-title:Microelectronics Reliability
language:en
Short-container-title:Microelectronics Reliability

Author:

Martins Victor Manuel Gonçalves,Villa Paulo Ricardo Cechelero,Travessini Rodrigo,Berejuck Marcelo Daniel,Bezerra Eduardo Augusto

Funder

National Council for Scientific and Technological Development

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Surfaces, Coatings and Films,Safety, Risk, Reliability and Quality,Condensed Matter Physics,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials

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4. Using relocatable bitstreams for fault tolerance;Montminy,2007

5. Research article - mechanism of resource virtualization in RCS for multitask stream applications;Kirischian;Int. J. Reconfig. Comput.,2010

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