Analysis of noise behavior and reliability of pocket doped negative capacitance FET under the impact of trap charges and temperature-Reference-Cited by-同舟云学术

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Analysis of noise behavior and reliability of pocket doped negative capacitance FET under the impact of trap charges and temperature

Published:2024-01 Issue: Volume:152 Page:115301
ISSN:0026-2714
Container-title:Microelectronics Reliability
language:en
Short-container-title:Microelectronics Reliability

Author:

Malvika ,Talukdar Jagritee,Choudhuri Bijit,Mummaneni Kavicharan

Funder

National Institute of Technology Srinagar

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Surfaces, Coatings and Films,Safety, Risk, Reliability and Quality,Condensed Matter Physics,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials

Reference42 articles.

1. Device scaling limits of Si MOSFETs and their application dependencies;Frank;Proc. IEEE,2001

2. Supply and threshold-voltage trends for scaled logic and SRAM MOSFETs;Morifuji;IEEE Trans. Electron Devices,2006

3. Material and device engineering in fully depleted silicon-on-insulator transistors to realize a steep subthreshold swing using negative capacitance;Ota;Jpn. J. Appl. Phys.,2016

4. Low power negative capacitance FETs for future quantum-well body technology;Yeung,2013

5. Negative capacitance transistors with monolayer black phosphorus;Liu;Npj Quantum Mater.,2016

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