Author:
PanneerSelvam Sasikala,Pal Susanta Kumar,Chandramani Premanand Venkatesh,Raj Srinivasan
Funder
Department of Atomic Energy, Government of India
Board of Research in Nuclear Sciences
Subject
Electrical and Electronic Engineering,Surfaces, Coatings and Films,Safety, Risk, Reliability and Quality,Condensed Matter Physics,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials
Reference32 articles.
1. Tunnel FETs for Low Power Electronics;Vandooren,2016
2. Performance Estimation of Junctionless FinFET With Graded Channel Design;Kaundal,2017
3. Origin of device performance enhancement of Junctionless Accumulation- Mode (JAM) Bulk FinFETs with high-κ gate spacers;Choi;IEEE Electron Device Lett.,2014
4. Investigating the Scalability of Nanowire Junctionless Accumulation Mode FETs Using an Intrinsic Pocket;Jain,2019
5. Performance analysis of n-type junctionless silicon nanotube field effect transistor;Ambika;J. Nanoelectron. Optoelectron.,2016
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