A novel method to improve cell endurance window in source-side injection split gate flash memory-Reference-Cited by-同舟云学术

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A novel method to improve cell endurance window in source-side injection split gate flash memory

Published:2012-06 Issue:6 Volume:52 Page:1055-1059
ISSN:0026-2714
Container-title:Microelectronics Reliability
language:en
Short-container-title:Microelectronics Reliability

Author:

Tsair Yong-Shiuan,Fang Yean-Kuen,Juang Feng-Renn,Wang Yu-Hsiung,Chu Wen-Ting,Lin Yung-Tao,Tran Luan

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Surfaces, Coatings and Films,Safety, Risk, Reliability and Quality,Condensed Matter Physics,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials

Reference23 articles.

1. An analytical model for optimization of programming efficiency and uniformity of split gate source-side injection super flash memory;Guan;IEEE Trans Electron Dev,2003

2. A 5V-only 16m flash memory using a contactless array of source-side injection cells;Tsao;Proc VLSI Circ Dig Tech Papers,1995

3. Nonvolatile semiconductor memory technology;Brown,1987

4. Embedded non-volatile memory, TSMC’s EmbFlash. Available: .

5. A novel self-aligned highly reliable sidewall split-gate flash memory NAND architecture;Cho;IEEE Trans Electron Dev,2006

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