1. An in-Array Build-In Self-Test Scheme for Embedded SRAM Array;IEEE Transactions on Circuits and Systems II: Express Briefs;2024-08
2. Design and Implementation of BIST logic for High Speed and Energy Efficient Carry Select Adder(CSLA);2024 Third International Conference on Smart Technologies and Systems for Next Generation Computing (ICSTSN);2024-07-18
3. A Graph AutoEncoder Approach for Fault Prediction in Test Pattern Generation;2024 2nd International Symposium of Electronics Design Automation (ISEDA);2024-05-10
4. Word-Oriented Memory Test and Coupling Fault Coverage: a RAW and RAW1 Case Study;2024 Panhellenic Conference on Electronics & Telecommunications (PACET);2024-03-28
5. Gradient Boosting-Accelerated Evolution for Multiple-Fault Diagnosis;2024 Design, Automation & Test in Europe Conference & Exhibition (DATE);2024-03-25