DC offset elimination method of Phase-locked loop based on novel generalized integrator
Author:
Funder
Liaoning Provincial Natural Science Foundation
Publisher
Elsevier BV
Subject
General Energy
Reference9 articles.
1. Five approaches to deal with problem of DC offset in phase-locked loop algorithms: Design considerations and performance evaluations;Golestan;IEEE Trans Power Electron,2016
2. Design of a fast response time single-phase PLL with DC offset rejection capability;Kulkarni;Electr Power Syst Res,2017
3. Adaptive low-pass filter based DC offset removal technique for three-phase PLLs;Kanjiya;IEEE Trans Ind Electron,2018
4. Multiple DSC filter-based three-phase EPLL for nonideal grid synchronization;Wu;IEEE J Emerg Sel Topics Power Electron,2017
5. DC-offset elimination method for grid synchronisation;Li;Electron Lett,2017
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