A clock-based dynamic logic for schedulability analysis of CCSL specifications-Reference-Cited by-同舟云学术

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A clock-based dynamic logic for schedulability analysis of CCSL specifications

Published:2021-02 Issue: Volume:202 Page:102546
ISSN:0167-6423
Container-title:Science of Computer Programming
language:en
Short-container-title:Science of Computer Programming

Author:

Zhang Yuanrui^ORCID,Mallet Frédéric^ORCID,Zhu Huibiao,Chen Yixiang,Liu Bo,Liu Zhiming^ORCID

Funder

Southwest University

NSFC

Special Foundation for Basic Science and Frontier Technology Research Program of Chongqing

National Key Research and Development Program of China

National Natural Science Foundation of China

Publisher

Elsevier BV

Subject

Software

Reference36 articles.

1. A logical approach for the schedulability analysis of ccsl;Zhang,2019

2. Clock constraint specification language: specifying clock constraints with UML/MARTE;Mallet;Innov. Syst. Softw. Eng.,2008

3. UML profile for MARTE: modeling and analysis of real-time embedded systems;OMG,2011

4. Syntax and Semantics of the Clock Constraint Specification Language (CCSL);André,2009

5. Time, clocks, and the ordering of events in a distributed system;Lamport;Commun. ACM,1978

Cited by 2 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A dynamic logic with branching modalities;Journal of Logical and Algebraic Methods in Programming;2024-01

2. Accelerating Reinforcement Learning-Based CCSL Specification Synthesis Using Curiosity-Driven Exploration;IEEE Transactions on Computers;2023-05-01

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