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Stacked-nanowire device with virtual source/drain (SD-VSD) for 3D NAND flash memory application

  • Published:2011-10 Issue:1 Volume:64 Page:42-46
  • ISSN:0038-1101
  • Container-title:Solid-State Electronics
  • language:en
  • Short-container-title:Solid-State Electronics

Author:

Yun Jang-Gn,Cho Seongjae,Park Byung-Gook

Publisher

Elsevier BV

Subject

Materials Chemistry,Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Reference25 articles.

1. Non-volatile memory technologies: the quest for ever lower cost;Lai;IEDM Tech Dig,2008

2. Bit cost scalable technology with punch and plug process for ultra high density flash memory;Tanaka;VLSI Tech Dig,2007

3. Bit-cost scalable flash memory;Fukuzumi;IEDM Tech Dig,2007

4. Multi-layered vertical gate NAND flash overcoming stacking limit for terabit density storage;Kim;VLSI Tech Dig,2009

5. Vertical cell array using TCAT (terabit cell array transistor) technology for ultra high density NAND flash memory;Jang;VLSI Tech Dig,2009

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