Identification of Si film traps in p-channel SOI FinFETs using low temperature noise spectroscopy

Author:

Achour H.,Cretu B.,Simoen E.,Routoure J.-M.,Carin R.,Benfdila A.,Aoulaiche M.,Claeys C.

Publisher

Elsevier BV

Subject

Materials Chemistry,Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Reference23 articles.

1. International Technology Roadmap for Semiconductors. .

2. Multi-gate SOI MOSFETs;Colinge;Microelectron Eng,2007

3. Impact strain engineering on gate stack quality and reliability;Claeys;Solid-State Electron,2008

4. Selective epitaxial growth of SiGe for strained Si transistors;Ning;Mater Sci Eng B,2006

5. MOSFET’s with reduced low frequency 1/f noise;Katto;Jpn J Appl Phys,1975

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1. RTS Noise Characterization of Trap Properties in InGaAs nFinFETs;IEEE Transactions on Electron Devices;2023-07

2. Low-frequency noise characterization of gate oxide trap depth distribution of MOSFETs;Applied Physics Letters;2023-05-29

3. Variable-Temperature Noise Characterization of N-MOSFETs Using an In-Situ Broadband Amplifier;IEEE Journal of the Electron Devices Society;2021

4. Low frequency noise analysis on Si/SiGe superlattice I/O n-channel FinFETs;Solid-State Electronics;2020-06

5. Low frequency noise analysis on Si/SiGe superlattice I/O n-channel FinFETs;2019 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS);2019-04

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