A 72% error reduction scheme based on temperature acceleration for long-term data storage applications: Cold flash and millennium memories
Author:
Funder
JST
Publisher
Elsevier BV
Subject
Materials Chemistry,Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials
Reference30 articles.
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3. Highly reliable and low power SSD using asymmetric coding and stripe bitline-pattern elimination programming;Tanakamaru;IEEE J Solid-State Circuits,2012
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5. Hachiya S, Johguchi K, Miyaji K, Takeuchi K. TLC/MLC NAND flash mix-and-match design with exchangeable storage array. In: Ext abst of the 2013 int conf solid state devices and materials; 2013. p. 894–5.
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1. Write and Read Frequency-Based Word-Line Batch $V_{\mathrm{TH}}$ Modulation for 2-D and 3-D-TLC NAND Flash Memories;IEEE Journal of Solid-State Circuits;2018-10
2. Thin-Film Carbon Nanofuses for Permanent Data Storage;ACS Omega;2017-06-02
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