Simulation-based study on characteristics of dual vertical transfer gates in sub-micron pixels for CMOS image sensors

Author:

Lee Wook,Ko Seonghoon,Kim Jae Ho,Kim Yoon-Suk,Kwon Uihui,Kim HyunChul,Kim Dae Sin

Publisher

Elsevier BV

Subject

Materials Chemistry,Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Reference11 articles.

1. A 1/2.8-inch 24Mpixel CMOS image sensor with 0.9μm unit pixels separated by full-depth deep-trench isolation;Kim,2018

2. A 0.8 µm smart dual conversion gain pixel for 64 megapixels CMOS image sensor with 12k e- full-well capacitance and low dark noise;Park,2019

3. 1/2.74-inch 32Mpixel-prototype CMOS image sensor with 0.64μm unit pixels separated by full-depth deep-trench isolation;Park,2021

4. A 0.6 µm small pixel for high resolution CMOS image sensor with full well capacity of 10,000e- by dual vertical transfer gate technology;Yun,2022

5. Potential engineering to enhance transfer characteristics of advanced CIS pixel based on VTG – FDTI scheme;Kim,2021

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