Body Bias usage in UTBB FDSOI designs: A parametric exploration approach-Reference-Cited by-同舟云学术

Body Bias usage in UTBB FDSOI designs: A parametric exploration approach

Published:2016-03 Issue: Volume:117 Page:138-145
ISSN:0038-1101
Container-title:Solid-State Electronics
language:en
Short-container-title:Solid-State Electronics

Author:

Puschini Diego,Rodas Jorge,Beigne Edith,Altieri Mauricio,Lesecq Suzanne

Funder

France, ECSEL Joint Undertaking and Catrene

Publisher

Elsevier BV

Subject

Materials Chemistry,Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Reference25 articles.

1. Planes N, Weber O, Barral V, Haendler S, Noblet D, Croain D, et al. 28nm fdsoi technology platform for high-speed low-voltage digital applications. In: 2012 Symposium on VLSI Technology (VLSIT); 2012. p. 133–4. http://dx.doi.org/10.1109/VLSIT.2012.6242497.

2. Golanski D, Fonteneau P, Fenouillet-Beranger C, Cros A, Monsieur F, Guitard N, et al. First demonstration of a full 28nm high-k/metal gate circuit transfer from bulk to utbb fdsoi technology through hybrid integration. In: 2013 Symposium on VLSI Circuits (VLSIC); 2013. p. T124–5.

3. de Streel G, Bol D. Scaling perspectives of ULV microcontroller cores to 28nm UTBB FDSOI CMOS. In: SOI-3D-subthreshold microelectronics technology unified conference (S3S). 2013 IEEE; 2013. p. 1–2. http://dx.doi.org/10.1109/S3S.2013.6716553.

4. Makipaa J, Billoint O. Fdsoi versus BULK CMOS at 28nm node which technology for ultra-low power design? In: 2013 IEEE International Symposium on Circuits and Systems (ISCAS); 2013. p. 554–7. http://dx.doi.org/10.1109/ISCAS.2013.6571903.

5. Ultra-low power vlsi circuit design demystified and explained: a tutorial;Alioto;IEEE Trans Circ Syst I: Regular Papers,2012

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