On noise-induced transient bit flips in subthreshold SRAM

Author:

Van Brandt LéopoldORCID,Silveira FernandoORCID,Delvenne Jean-Charles,Flandre DenisORCID

Publisher

Elsevier BV

Subject

Materials Chemistry,Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Reference28 articles.

1. Near-threshold computing: Reclaiming Moore’s law through energy efficient integrated circuits;Dreslinski;Proc IEEE,2010

2. Ultra-low power VLSI circuit design demystified and explained: A tutorial;Alioto;IEEE Trans Circuits Syst I Regul Pap,2012

3. Stable SRAM cell design for the 32 nm node and beyond;Chang,2005

4. Modeling and mitigation of static noise margin variation in subthreshold SRAM cells;Zheng;IEEE Trans Circuits Syst I Regul Pap,2017

5. A high-density subthreshold SRAM with data-independent bitline leakage and virtual ground replica scheme;Kim,2007

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1. Stochastic Nonlinear Dynamical Modelling of SRAM Bitcells in Retention Mode;2024 8th IEEE Electron Devices Technology & Manufacturing Conference (EDTM);2024-03-03

2. Variability-Aware Noise-Induced Dynamic Instability of Ultra-Low-Voltage SRAM Bitcells;2024 IEEE 15th Latin America Symposium on Circuits and Systems (LASCAS);2024-02-27

3. Predicting State Transitions in Autonomous Nonlinear Bistable Systems With Hidden Stochasticity;IEEE Control Systems Letters;2024

4. Variance and Skewness of Current Fluctuations Experimentally Evidenced in Single-Photon Avalanche Diodes;2023 International Conference on Noise and Fluctuations (ICNF);2023-10-17

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