Investigations of stress distributions in tungsten-filled via structures using finite element analysis-Reference-Cited by-同舟云学术

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Investigations of stress distributions in tungsten-filled via structures using finite element analysis

Published:1997-10 Issue:10-11 Volume:37 Page:1549-1552
ISSN:0026-2714
Container-title:Microelectronics Reliability
language:en
Short-container-title:Microelectronics Reliability

Author:

Coughlan J.,Foley S.,Mathewson A.

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Surfaces, Coatings and Films,Safety, Risk, Reliability and Quality,Condensed Matter Physics,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials

Reference7 articles.

1. A Study of the Influence of Inter-Metal Dielectrics on Electromigration Performance;Foley,1995

2. Via-hole related simultaneous stress-induced extrusion and void formation in Al interconnects;Shibata,1993

3. Stress-Voiding in Tungsten-Plug Interconnect Systems by High-Temperature Processing;Walls;IEEE Electron Device Letters,1995

4. Via Delamination - A Novel Electromigration Failure Mechanism;Lee,1997

5. Swanson Analysis Systems, Inc., P.O. Box 65, Johnson Road, Houston, PA 15342-0065

Cited by 2 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Strain and tilt mapping in silicon around copper filled TSVs using advanced X-ray nano-diffraction;Microelectronic Engineering;2015-04

2. Stress measurements in tungsten coated through silicon vias for 3D integration;Thin Solid Films;2013-03

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