1. PEAS-III: An ASIP design environment;Itoh,2000
2. Synthesizable HDL generation method for configurable VLIW processors;Kobayashi,2004
3. Integrated circuit design method, database apparatus for designing integrated circuit and integrated circuit design support apparatus;Imai,2000
4. Compiler generation in PEAS-III: An ASIP development system;Kobayashi,2001
5. A simulator generator based on configurable VLIW model considering synthesizable HW description and SW tools generation;Okuda,2003