A new clock network synthesizer for modern VLSI designs-Reference-Cited by-同舟云学术

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A new clock network synthesizer for modern VLSI designs

Published:2012-03 Issue:2 Volume:45 Page:121-131
ISSN:0167-9260
Container-title:Integration
language:en
Short-container-title:Integration

Author:

Lu Jingwei,Chow Wing-Kai,Sham Chiu-Wing

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Reference29 articles.

1. Clock routing for high-performance ICs;Jackson,1990

2. Minimum path-length equi-distant routing;Edahiro,1992

3. High-performance clock routing based on recursive geometric matching;Kahng,1991

4. The transient response of damped linear networks with particular regard to wide band amplifiers;Elmore;Journal of Applied Physics,1948

5. Exact zero skew;Tsay,1991

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