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A lifetime-aware analog circuit sizing tool

  • Published:2016-09 Issue: Volume:55 Page:349-356
  • ISSN:0167-9260
  • Container-title:Integration
  • language:en
  • Short-container-title:Integration

Author:

Afacan Engin,Berkol Gonenc,Dundar Gunhan,Pusane Ali E.,Baskaya Faik

Funder

Scientific and Technological Research Council of Turkey

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Reference25 articles.

1. E. Afacan et al., Adaptive sized quasi-Monte Carlo based yield aware analog circuit optimization tool, in CMOS Variability (VARI) , in: 5th European Workshop on. IEEE, 2014, pp. 1–6.

2. ANACONDA: Simulation-based synthesis of analog circuits via stochastic pattern search;Phelps;IEEE Trans. Comput. -Aided Des. Integr. Circuits Syst.,2000

3. AMGIE: A synthesis environment for CMOS analog integrated circuits;Van der Plas;IEEE Trans. Comput. -Aided Des. Integr. Circuits Syst.,2001

4. Reuse Based Methodologies and Tools in the Design of Analog and Mixed-signal Integrated Circuits;Castro-Lopez,2007

5. Simulation-based analog and RF circuit synthesis using a modified evolutionary strategies algorithm;Sonmez;Integr. VLSI J.,2011

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