1. Design-for-test and test time optimization for 3D SOCs;Roy,2017
2. “Roadmap evolution: From NTRS to ITRS, from ITRS 2.0 to IRDS;Paolo,2017
3. Test-cost modeling and optimal test-flow selection of 3-D-stacked ICs;Agrawal;IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.,2015
4. Handbook of 3D Integration, Volume 1: Technology and Applications of 3D Integrated Circuits;Philip,2011
5. The long road to 3-D integration: Are we there yet;Vucurevich,2007