1. S. Lin, N. Chang, Challenges in power-ground integrity, in: Proceedings of IEEE/ACM International Conference on Computer Aided Design, 2001, pp. 651–654.
2. R. Dutta, M. Marek-Sadowska, Automatic sizing of power ground (P/G) networks in VLSI, in: Proceedings of ACM/IEEE Design Automation Conference, 1989, pp. 783–786.
3. X. Wu, X. Hong, Y. Cai, Z. Luo, C.K. Cheng, J. Gu, W. Dai, Area minimization of power distribution network using efficient nonlinear programming techniques, in: Proceedings of IEEE/ACM International Conference on Computer-Aided Design, 2001, pp. 153–157.
4. T. Wang, C.C. Chen, Optimization of the power/ground network wire-sizing and spacing based on sequential network simplex algorithm, in: Proceedings of IEEE International Symposium on Quality Electronic Design, 2002, pp. 157–162.
5. Reliability-constrained area optimization of VLSI power/ground networks via sequence of linear programmings;Tan;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems,2003