An ultra low-power current-mode clock and data recovery design with input bit-rate adaptability for biomedical applications in CMOS 90 nm

Author:

Ahmadi-Farsani J.,Sadjedi H.,Ghaznavi-Ghoushchi M.B.

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Reference26 articles.

1. Wide-range dynamic power management in low-voltage low-power subthreshold SCL, circuits and systems II: express briefs;Tajalli;IEEE Trans.,2012

2. A low-power 13.56 MHz RF front-end circuit for implantable biomedical devices, biomedical circuits and systems;Shuenn-Yuh;IEEE Trans.,2013

3. 27.7 A 30.5 mm3 fully packaged implantable device with duplex ultrasonic data and power links achieving 95kb/s with<10-4 BER at 8.5 cm depth;Chang,2017

4. An RF-powered FDD radio for neural microimplants;Rajavi;IEEE J. Solid State Circ.,2017

5. A fully-integrated, miniaturized (0.125 mm2) 10.5 μW wireless neural sensor;Biederman;IEEE J. Solid State Circ.,2013

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