Yield constrained automated design algorithm for power optimized pipeline ADC-Reference-Cited by-同舟云学术

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Yield constrained automated design algorithm for power optimized pipeline ADC

Published:2020-09 Issue: Volume:74 Page:55-62
ISSN:0167-9260
Container-title:Integration
language:en
Short-container-title:Integration

Author:

Sadrafshari Vala,Sadrafshari Shamin,Sharifkhani Mohammad

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Reference38 articles.

1. CAD tools for data converter design: an overview," circuits and systems II: analog and digital signal processing;Gielen;IEEE Transactions on,1996

2. Systematic design for optimization of high-speed self-calibrated pipelined A/D converters," circuits and systems II: analog and digital signal processing;Goes;IEEE Transactions on,1998

3. Modeling and Design Optimisation for High-Resolution;Parenti,2005

4. November. A novel power optimization mechanism for pipelined ADCs;Fu,2015

5. Multilevel power optimization of pipelined A/D converters;Kim;IEEE Trans. Very Large Scale Integr. Syst.,2010

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1. Reinforcement-Learning-Based Successive Approximation Algorithm;2024 IEEE International Symposium on Circuits and Systems (ISCAS);2024-05-19

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