A fully integrated VLSI architecture using chaotic PWM for RF transmitter design with electromagnetic interference reduction-Reference-Cited by-同舟云学术

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A fully integrated VLSI architecture using chaotic PWM for RF transmitter design with electromagnetic interference reduction

Published:2022-03 Issue: Volume:83 Page:33-45
ISSN:0167-9260
Container-title:Integration
language:en
Short-container-title:Integration

Author:

Vidya P. Meenakshi,Sudha S.

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Reference21 articles.

1. CMOS RF transmitter using pulse width modulation for wireless smart sensors;Lee;IEEE Trans. Compon. Packag. Manuf. Technol.,2012

2. CMOS transmitters for 2.4-GHz RF devices: design architectures of the 2.4-GHz CMOS transmitter for RF devices;Badal;IEEE Microw. Mag.,2018

3. A fully parallel architecture for designing frequency-agile and real-time reconfigurable FPGA-based RF digital transmitters;Dinis;IEEE Trans. Microw. Theor. Tech.,2017

4. FPGA implementation and evaluation of a PWM-based RF modulator;Morales,2018

5. High dynamic range pseudo–two‐level digital pulse‐width modulation for power‐efficient RF transmitters;Arian;Int. J. Circ. Theor. Appl.,2019

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