SafeResynth: A new technique for physical synthesis
Author:
Publisher
Elsevier BV
Subject
Electrical and Electronic Engineering,Hardware and Architecture,Software
Reference27 articles.
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Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Functional Design Errors in Digital Circuits;Lecture Notes in Electrical Engineering;2009
2. SynECO: Incremental technology mapping with constrained placement and fast detail routing for predictable timing improvement;2008 IEEE International Conference on Computer Design;2008-10
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