1. A 4-bit 5 GS/s flash A/D converter in 0.18 /spl mu/m CMOS;Sheikhaei,2005
2. A 1 GHz CMOS analog-front-end fora partial-response read channel;Sun;IEEE JSSC,2005
3. Design and test of a high-speed flash ADC mezzanine card for high-resolution and timing performance in nuclear structure experiments;Egea;IEEE Trans. Nucl. Sci.,2013
4. Design of 4-bit flash ADC cell for UWB sensor systems;Sokol,2019
5. A low-power 5 GS/s 6b flash ADC with 2-stage multi-bit search and 2×time-domain interpolation;Feng,2020