Circuit implementation of on-chip trainable spiking neural network using CMOS based memristive STDP synapses and LIF neurons

Author:

Vohra Sahibia KaurORCID,Thomas Sherin A.,Sakare Mahendra,Das Devarshi Mrinal

Funder

Ministry of Education, India

Ministry of Electronics and Information technology

Science and Engineering Research Board

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Reference37 articles.

1. Spiking neural network integrated circuits: a review of trends and future directions;Basu,2022

2. Columnar-organized memory (COM): Brain-inspired associative memory with large capacity and robust retrieval;Shamsi;Biol. Inspired Cognit. Archit.,2017

3. Interspike-interval-based analog spike-time-dependent encoder for neuromorphic processors;Zhao;IEEE Trans. Very Large Scale Integr. (VLSI) Syst.,2017

4. Neuromemristive circuits for edge computing: A review;Krestinskaya;IEEE Trans. Neural Netw. Learn. Syst.,2019

5. Neuromorphic computing based on emerging memory technologies;Rajendran;IEEE J. Emerg. Sel. Top. Circuits Syst.,2016

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