1. R. Nitzan, S. Wimer, AMPS and SiClone integration for implementing 0.18μm to 0.13μm design migration, in: Proceedings of the Synoposys Users Group (SNUG) Conference, San Jose CA, 2002.
2. 〈http://www.intel.com/content/www/us/en/silicon-innovations/intel-tick-tock-model-general.html〉
3. R. Saleh, et al., System-on-chip: reuse and integration, in: Proceedings of the IEEE 94(6): (2006) 1050–1069.
4. Foundries and the dawn of an open IP era;Chiang;Computer,2001
5. Compaction;Lengauer,1990