Circuit layout through an analogy with neural networks-Reference-Cited by-同舟云学术

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Circuit layout through an analogy with neural networks

Published:1992-05 Issue:5 Volume:24 Page:251-257
ISSN:0010-4485
Container-title:Computer-Aided Design
language:en
Short-container-title:Computer-Aided Design

Author:

Rao D.S.,Patnaik L.M.

Publisher

Elsevier BV

Subject

Industrial and Manufacturing Engineering,Computer Graphics and Computer-Aided Design,Computer Science Applications

Reference31 articles.

1. The complexity of design automation problems;Sahni,1980

2. Optimization by simulated annealing;Kirkpatrick;Science,1983

3. Analysis of placement procedures for VLSI standard cell layout;Hartoog,1986

4. An efficient heuristic procedure for partitioning graphs;Kernighan;BSTJ,1970

5. A procedure for placement of standard cell VLSI circuits;Dunlop;IEEE Trans. Comput.-Aided Des.,1985

Cited by 3 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Neural Networks;Intelligent Optimisation Techniques;2000

2. Mapping and hierarchical self-organizing neural networks for VLSI placement;IEEE Transactions on Neural Networks;1997-03

3. Reuse of CAD designs by a neural-network approach;Engineering Applications of Artificial Intelligence;1996-08

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