An FPGA-based 500 M samples per second throughput time-to-digital converter without ineffective bin

Author:

Zhou ErruiORCID,Li Binkang,Yang Shaohua,Yan Ming,Li Gang,Guo Mingan,Liu Lu,Wang Jing,Shi Mingyue,Li Haitao

Publisher

Elsevier BV

Subject

Instrumentation,Nuclear and High Energy Physics

Reference30 articles.

1. Development of a time-to-digital converter ASIC for the upgrade of the ATLAS monitored drift tube detector;Wang;Nucl. Instrum. Methods Phys. Res. A,2018

2. An 8-ch LIDAR receiver based on TDC with multi-interval detection and real-time in-situ calibration;Li;IEEE Trans. Instrum. Meas.,2020

3. A CMOS SPAD sensor with a multi-event folded flash time-to-digital converter for ultra-fast optical transient capture;Abbas;IEEE Sens. J.,2018

4. A 16 mW 250 ps double-hit-resolution input-sampled time-to-digital converter in 45 nm CMOS;Rehman;IEEE Trans. Circuits Syst. II,2018

5. Low power and small area, 6.9 ps RMS time-to-digital converter for 3-D digital SiPM;Roy;IEEE Trans. Radiat. Plasma Med. Sci.,2017

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