Ternary encoder and decoder designs in RRAM and CNTFET technologies
Author:
Publisher
Elsevier BV
Subject
Electrical and Electronic Engineering,General Engineering,Energy Engineering and Power Technology
Reference39 articles.
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1. Energy-efficient design of quaternary logic gates and arithmetic circuits using hybrid CNTFET-RRAM technology;Physica Scripta;2024-07-22
2. Design analysis of a low-power, high-speed 8 T SRAM cell using dual-threshold CNTFETs;Physica Scripta;2024-07-19
3. Low-power and robust ternary SRAM cell with improved noise margin in CNTFET technology;Physica Scripta;2024-05-09
4. Design method for unbalanced ternary logic family based on binary memristors;Nonlinear Dynamics;2024-03-14
5. CNTFET-based SRAM cell design using INDEP technique;e-Prime - Advances in Electrical Engineering, Electronics and Energy;2024-03
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