Architectural design and analysis of a VLIW processor-Reference-Cited by-同舟云学术

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Architectural design and analysis of a VLIW processor

Published:1995-03 Issue:2 Volume:21 Page:119-142
ISSN:0045-7906
Container-title:Computers & Electrical Engineering
language:en
Short-container-title:Computers & Electrical Engineering

Author:

Abnous Arthur,Bagherzadeh Nader

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,General Computer Science,Control and Systems Engineering

Reference25 articles.

1. Trace scheduling: a technique for global microcode compaction;Fisher;IEEE Trans. Computers,1981

2. Percolation scheduling: a parallel compilation technique;Nicolau,1985

3. Percolation-based compiling for evaluation of parallelism and hardware design trade-offs;Potasman,1991

Cited by 4 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. 2D-VLIW: An Architecture Based on the Geometry of Computation;IEEE 17th International Conference on Application-specific Systems, Architectures and Processors (ASAP'06);2006-09

2. A Parallel Pipeline Based Multiprocessor System For Real-Time Measurement of Road Traffic Parameters;Real-Time Imaging;2000-06

3. A programmable image processor for real-time image processing applications;Microprocessors and Microsystems;1999-06

4. Triple RISC image operator for real-time image processing applications;Electronics Letters;1996

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