Compression-aware dynamic cache reconfiguration for embedded systems

Author:

Hajimiri Hadi,Rahmani Kamran,Mishra Prabhat

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,General Computer Science

Reference22 articles.

1. A low power unified cache architecture providing power and performance flexibility;Malik;ISLPED,2000

2. Automatic tuning of two-level caches to embedded applications;Gordon-Ross;DATE,2004

3. C. Lefurgy, Efficient execution of compressed programs, Ph.D. Thesis, University of Michigan, 2000.

4. A class of code compression schemes for reducing power consumption in embedded microprocessor systems;Benini;IEEE Transactions on Computers,2004

5. Fast configurable-cache tuning with a unified second level cache;Gordon-Ross,2005

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1. Efficient Cache Reconfiguration Using Machine Learning in NoC-Based Many-Core CMPs;ACM Transactions on Design Automation of Electronic Systems;2019-11-14

2. Design of an Intelligent Data Cache with Replacement Policy;International Journal of Embedded and Real-Time Communication Systems;2019-04

3. Cache Reconfiguration Using Machine Learning for Vulnerability-aware Energy Optimization;ACM Transactions on Embedded Computing Systems;2019-03-31

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