Author:
Chen Tom,Kim Von-Kyoung,Tegethoff Mick
Reference23 articles.
1. The use and evaluation of yield models in integrated circuit manufacturing
2. Integrated Circuit Yield Statistics;Stapper;Proceedings of IEEE,1983
3. Cost-Size Optima of Monolithic Integrated Circuits;Murphy;Proceedings of IEEE,1964
4. R. Seeds, Yield and Cost Analysis of Bipolar LSI, in International Electron Device Meeting, Oct. 1967.
5. What Level of LSI is Best for You?;Moore;Electronics,1970
Cited by
3 articles.
订阅此论文施引文献
订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献