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2. The defect sensitivity effect of memory chips;Stapper;IEEE JSSC,1986
3. Modelling of integrated circuit defect sensitivities;Stapper;IBM J. Res. Dev.,1983
4. Integrated circuit yield forecast;Stapper;IEEE JSSC,1983
5. Modelling of the critical area in yield forecast;Ferris-Prabhu;IEEE JSSC,1985