A hardware mid-value select voter architecture-Reference-Cited by-同舟云学术

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A hardware mid-value select voter architecture

Published:2001-02 Issue:2 Volume:32 Page:149-162
ISSN:0026-2692
Container-title:Microelectronics Journal
language:en
Short-container-title:Microelectronics Journal

Author:

Stojcev M.K.,Djordjevic G.Lj.,Krstic M.D.

Publisher

Elsevier BV

Subject

General Engineering

Reference14 articles.

1. Fault-tolerant computing — an overview;Avizienis;IEEE Comput.,1971

2. Fault tolerant computing: an introduction and a viewpoint;Carter;IEEE Trans. Comput., C,1973

3. Analysis of faults in an N-version software experiment;Brilliant;IEEE Trans. Software Engng,1990

4. Design and Analysis of Fault-Tolerant Digital Systems;Johnson,1989

Cited by 5 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Experimental Performance Evaluation of Smoothing Predictive Redundancy Using Embedded Microcontroller Unit;IEEE Transactions on Industrial Electronics;2011-03

2. Reliability of Nanoscale Circuits and Systems;2011

3. Fault-Tolerant Architectures and Approaches;Reliability of Nanoscale Circuits and Systems;2010-09-21

4. A mid-value select voter;Microelectronics Reliability;2005-03

5. A fuzzy voting scheme for hardware and software fault tolerant systems;Fuzzy Sets and Systems;2005-03

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