1. Technology mapping for large complex PLDs;Anderson,1998
2. Power-aware technology mapping for LUT-based FPGAs;Anderson,2002
3. Routable technology mapping for LUT FPGAs;Bhat,1992
4. Technology mapping for LUT FPGA based on decomposition of binary decision diagrams;Chang;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems,1996
5. Factor cuts;Chatterjee,2006