1. Main memory organization trade-offs with DRAM and STT-MRAM options based on gem5-NVMain simulation frameworks;Komalan,2018
2. Logic circuits design based on MRAM: From single to multi-states cells storage;Jovanović,2015
3. New insights into dielectric breakdown of MgO in STT-MRAM devices;Pey,2019
4. Modeling of dielectric breakdown-induced time-dependent STT-MRAM performance degradation;Panagopoulos,2011
5. First demonstration of field-free perpendicular SOT-MRAM for ultrafast and high-density embedded memories;Cai,2022