1. The Theory of Latency Insensitive Design;Carloni;IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems,2001
2. D. Potop-Butucaru, B. Caillaud and A. Benveniste. Concurrency in Synchronous Systems. In Proc. of ACSD 2004, Hamilton, Canada, 2004
3. Moving from Weakly Endochronous Systems to Delay-Insensitive Circuits;Dasgupta;ENTCS,2006
4. A. Madalinski, “Interactive Synthesis of Asynchronous Systems based on Partial Order Semantics”. PhD thesis, Newcastle Univ, 2006
5. M. Koutny, M. Pietkiewicz-koutny, “Transition Systems of Elementary Net Systems with Localities”. In Proc. CONCUR, Bonn, Germany, 2006, pp 173–187