Via Technologies for MEMS

Author:

Henttinen Kimmo

Publisher

Elsevier

Reference22 articles.

1. Electromigration reliability issues in dual damascene Cu interconnections;Ogawa;IEEE Transactions on Reliability,2002

2. F. Laermer, A. Schilp, Method for anisotropic plasma etching of substrates. US patent 5,498,312 (March 12, 1996) and F. Laermer , A. Schilp, Method of anisotropically etching silicon. US Patent 5,501,893 (March 26, 1996).

3. E. Kälvesten, T. Ebefors, N. Svedin, P. Rangsten, T. Schönberg, Elektriska anslutningar i substrat/Electrical connections in substrates. Swedish Patent No. 0300784.

4. A. Lehto, Capacitive pressure detector structure and method for manufacturing same. US Patent 4,597,027 (June 24, 1986).

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1. Conductive Polymer Metallized Vias: A New Approach for Substrate Integrated Waveguide Development;IEEE Transactions on Components, Packaging and Manufacturing Technology;2019-06

2. Vacuum-Assisted Through Silicon via Filling Method With Ag-Based Epoxy;IEEE Transactions on Components, Packaging and Manufacturing Technology;2016-10

3. Fabrication and electrical characterization of partially metallized vias fabricated by inkjet;Journal of Micromechanics and Microengineering;2016-03-18

4. Packaging Technology for Devices in Autonomous Sensor Networks;Springer Series on Chemical Sensors and Biosensors;2012

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