Simulation and verification of associative processor arrays-Reference-Cited by-同舟云学术

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Simulation and verification of associative processor arrays

Published:1992-12 Issue:12 Volume:18 Page:1403-1414
ISSN:0167-8191
Container-title:Parallel Computing
language:en
Short-container-title:Parallel Computing

Author:

Duller A.W.G.,Storer R.

Publisher

Elsevier BV

Subject

Artificial Intelligence,Computer Graphics and Computer-Aided Design,Computer Networks and Communications,Hardware and Architecture,Theoretical Computer Science,Software

Reference9 articles.

1. The design of an associative processor array;Duller,1989

2. Towards the automated design of Application Specific Array Processors;Marriott,1990

3. Glitch simulation version 2.0;Duller,1988

4. A CAM based Processor Array as part of a Heterogeneous Vision Architecture;Duller,1991

5. Instruction set processor specifications ISPS: The notation and its applications;Barbacci;IEEE Trans. Comput.,1981

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