Fast context switches: compiler and architectural support for preemptive scheduling-Reference-Cited by-同舟云学术

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Fast context switches: compiler and architectural support for preemptive scheduling

Published:1995-01 Issue:1 Volume:19 Page:35-42
ISSN:0141-9331
Container-title:Microprocessors and Microsystems
language:en
Short-container-title:Microprocessors and Microsystems

Author:

Snyder Jeffrey S.,Whalley David B.,Baker Theodore P.

Publisher

Elsevier BV

Subject

Artificial Intelligence,Computer Networks and Communications,Hardware and Architecture,Software

Reference13 articles.

1. Real-Time Systems Design;Levi,1990

2. The effect of context switches on cache performance;Mogul,1991

3. Cache performance of operating system and multiprogram workloads;Agarwal;ACM Trans. Comput. Syst.,1988

4. Flexible register management for sequential programs;Quammen;18th Annual International Symposium on Computer Architecture,1991

5. Exploiting of context switches on cache performance;Miller,1991

Cited by 16 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Context switch cost aware joint task merging and scheduling for deep learning applications;Parallel Computing;2021-05

2. A High-Throughput Network Processor Architecture for Latency-Critical Applications;IEEE Micro;2020-01-01

3. Latency Critical Operation in Network Processors;2019 IEEE Symposium on High-Performance Interconnects (HOTI);2019-08

4. Chimera;ACM SIGARCH Computer Architecture News;2015-05-29

5. Chimera;ACM SIGPLAN Notices;2015-05-12

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