An ASIC for fast grey-scale dilation-Reference-Cited by-同舟云学术

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An ASIC for fast grey-scale dilation

Published:1996-04 Issue:2 Volume:20 Page:89-95
ISSN:0141-9331
Container-title:Microprocessors and Microsystems
language:en
Short-container-title:Microprocessors and Microsystems

Author:

Andreadis I.,Gasteratos A.,Tsalides Ph.

Publisher

Elsevier BV

Subject

Artificial Intelligence,Computer Networks and Communications,Hardware and Architecture,Software

Reference10 articles.

1. Image Analysis and Mathematical Morphology;Serra,1982

2. Algorithms for decomposition of grayscale morphological operations;Jones;IEEE Trans. Patt. Anal. Machine Intell.,1994

3. Grayscale morphology;Sternberg,1986

4. Pipeline architectures for image processing;Sternberg,1985

5. Cellular Logic Image Processing;Duff,1986

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1. A Reconfigurable Accelerator for Morphological Operations;2018 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW);2018-05

2. Real-time morphological pipeline architecture using high-capacity programmable logical devices;Journal of Electronic Imaging;2007-04-01

3. User transparency: a fully sequential programming model for efficient data parallel image processing;Concurrency and Computation: Practice and Experience;2004-04-02

4. Fast binary and gray-scale mathematical morphology on VLIW media processors;Real-Time Imaging IV;1999-03-26

5. Realization of rank order filters based on majority gate;Pattern Recognition;1997-09

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