Design and experimental validation of an FPGA-based PMU simultaneously compliant with P and M performance classes-Reference-Cited by-同舟云学术

Design and experimental validation of an FPGA-based PMU simultaneously compliant with P and M performance classes

Published:2020-12 Issue: Volume:189 Page:106650
ISSN:0378-7796
Container-title:Electric Power Systems Research
language:en
Short-container-title:Electric Power Systems Research

Author:

Derviškadić Asja^ORCID,Paolone Mario^ORCID

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Energy Engineering and Power Technology

Reference21 articles.

1. IEEE Standard for Synchrophasor Measurements for Power Systems;IEEE Std C37.118.1-2011 (Revision of IEEE Std C37.118-2005),2011

2. IEEE/IEC International Standard - Measuring relays and protection equipment - Part 118-1: Synchrophasor for power systems - Measurements;IEC/IEEE 60255-118-1:2018,2018

3. Exploring the relative performance of frequency-tracking and fixed-filter phasor measurement unit algorithms under C37.118 test procedures, the effects of interharmonics, and initial attempts at merging P-class response with M-class filtering;Roscoe;IEEE Trans. Instrum. Meas.,2013

4. A fast and accurate PMU algorithm for P+M class measurement of synchrophasor and frequency;Castello;IEEE Trans. Instrum. Meas.,2014

5. Iterative-interpolated DFT for synchrophasor estimation: a single algorithm for P- and M-class compliant PMUs;Derviškadić;IEEE Trans. Instrum. Meas.,2018

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