A PCI bus simulation framework and some simulation results on PCI standard 2.1 latency limitations-Reference-Cited by-同舟云学术

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A PCI bus simulation framework and some simulation results on PCI standard 2.1 latency limitations

Published:2002-03 Issue:9 Volume:47 Page:807-819
ISSN:1383-7621
Container-title:Journal of Systems Architecture
language:en
Short-container-title:Journal of Systems Architecture

Author:

Finkelstein Ehud,Weiss Shlomo

Publisher

Elsevier BV

Subject

Hardware and Architecture,Software

Reference25 articles.

1. Computer Architecture: A Quantitative Approach;Hennessy,1996

2. The Anatomy of a High Performance Microprocessor: A Systems Perspective;Shriver,1998

3. Microprocessor system buses: a case study;Finkelstein;J. Syst. Architec.,1999

4. PCI Local Bus Specifications, Revision 2.1. PCI Special Interest Group, 1996

5. PCI System Architecture;Shanley,1995

Cited by 1 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. System performance evaluation by combining RTC and VHDL simulation: A case study on NICs;Journal of Systems Architecture;2013-11

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