Analysis of power supply noise in AMS circuits including the effects of interconnects using estimation by inspection method

Author:

Sharma Vijender KumarORCID,Tripathi Jai Narayan,Shrimali Hitesh

Funder

Ministry of Electronics and Information technology

Nirma University

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering

Reference31 articles.

1. Power integrity modeling and design for semiconductors and systems;Swaminathan,2007

2. Bae B, Shim Y, Lee W, Koo K, Ahn W, Kim J. Hybrid modeling and analysis of power supply noise effects on analog-to-digital converter considering hierarchical PDNs. In: IEEE electrical design of advanced package & systems symposium. 2010. pp. 1–4.

3. Bae B, Shim Y, Cho J, Kim J. Modeling and analysis of power supply noise effects on analog-to-digital converter in 3D IC. In: IEEE workshop on electromagnetic compatibility of integrated circuits. 2011. pp. 198–202.

4. Modeling and measurement of power supply noise effects on an analog-to-digital converter based on a chip-PCB hierarchical power distribution network analysis;Bae;IEEE Trans Electr Compatib,2013

5. Modeling and analysis of simultaneous switching noise coupling for a CMOS negative-feedback operational amplifier in system-in-package;Shim;IEEE Trans Electr Compatib,2009

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