Power efficient SRAM design with integrated bit line charge pump

Author:

Wang Xu,Zhang Yuanzhi,Lu Chao,Mao Zhigang

Funder

Shanghai Pujiang Program of China

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering

Reference16 articles.

1. 0.4V SRAM with bit line swing suppression charge share hierarchical bit line scheme;Moriwaki;IEEE Custom Integrated Circuits Conference (CICC),2011

2. On-chip high-voltage generation in MNOS integrated circuits using an improved voltage multiplier technique;Dickson;IEEE J Solid State Circuits,1976

3. A high-efficiency CMOS voltage doubler;Favrat;IEEE J Solid State Circuits,1998

4. Area-efficient CMOS charge pumps for LCD drivers;Ying;IEEE J Solid State Circuits,2003

5. Efficient power conversion for ultra low voltage micro scale energy transducers;Lu,2010

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