1. Nested Miller compensation in low-power CMOS design;Leung;IEEE Trans Circuits Syst II: Analog Digital Signal Process,2001
2. Design guidelines for reversed nested miller compensation in three-stage amplifiers;Mita;IEEE Trans Circuits Syst II: Analog Digital Signal Process,2003
3. Improved reversed nested miller frequency compensation technique with voltage buffer and resistor;Grasso;IEEE Trans Circuits Syst Express Briefs,2007
4. Improved reversed nested miller frequency compensation techniques using flipped and folded flipped voltage follower with resistor for three stage amplifier;Gupta;Int J Electron Commun,2021
5. High performance reversed nested Miller frequency compensation;Biabanifard;Analog Integr Circuits Signal Process,2015