1. Cache coherence protocols: Evaluation using a multiprocessor simulation model;Archibald;ACM TODS,1986
2. A multi-level hierarchical cache coherence protocol for multiprocessors;Anderson,1993
3. Design and evaluation of a subblock cache coherence protocol for bus-based multiprocessors;Anderson,1994
4. The Cerberus multiprocessor simulator;Brooks,1989
5. Cache protocols with partial block invalidations;Chen,1993