Single-event burnout hardening evaluation with current and electric field redistribution of high voltage LDMOS transistors based on TCAD Simulations-Reference-Cited by-同舟云学术

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Single-event burnout hardening evaluation with current and electric field redistribution of high voltage LDMOS transistors based on TCAD Simulations

Published:2023-02 Issue: Volume:132 Page:105692
ISSN:0026-2692
Container-title:Microelectronics Journal
language:en
Short-container-title:Microelectronics Journal

Author:

Lei Yibo^ORCID,Fang Jian,liang Yingdong,Zhang Yisen,Yan Ling,Tang Lingli,Yang Xihe,Zhang Bo

Publisher

Elsevier BV

Subject

General Engineering

Reference32 articles.

1. Noise immunity and its temperature characteristics study of the capacitive-loaded level shift circuit for high voltage gate drive IC;Zhu;IEEE Trans. Ind. Electron.,2018

2. A current-source sinusoidal gate driver for high-frequency applications;Jedi,2018

3. Realization of over 650V double RESURF LDMOS with HVI for high side gate drive IC;Qiao,2006

4. A review on VDMOS as a power MOSFET;Gupta;IOSR J. Electron. Commun. Eng.,2016

5. A new ESD self-protection structure for 700V high side gate drive IC;Kim;29th International Symposium on Power Semiconductor Devices and IC's (ISPSD),2017

Cited by 1 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. DFT based atomic modeling and temperature analysis on the RF and VTC curve of high-k dielectric layer-assisted NCFET;Physica Scripta;2023-12-29

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