A high-reliability and low-power computing-in-memory implementation within STT-MRAM

Author:

Zhang LiuyangORCID,Deng Erya,Cai Hao,Wang You,Torres Lionel,Todri-Sanial AidaORCID,Zhang Youguang

Funder

National Natural Science Foundation of China (NSFC)

Ministries of Education and Foreign Experts of China

International Collaboration Project

Ministry of Science and Technology of China

Innovation Foundation of BUAA

EU H2020 CONNECT

Publisher

Elsevier BV

Subject

General Engineering

Reference30 articles.

1. Ultra-efficient processing in-memory for data intensive applications;Imani,2017

2. GPUs and the future of parallel computing;Keckler;IEEE Micro,2011

3. Pinatubo: a processing-in-memory architecture for bulk bitwise operations in emerging non-volatile memories;Li,2016

4. A scalable processing-in-memory accelerator for parallel graph processing;Ahn,2015

5. High-density and robust STT-MRAM array through device/circuit/architecture interactions;Kwon;IEEE Trans. Nanotechnol.,2015

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