Triple transistor based fault tolerance for resource constrained applications

Author:

Mukherjee Atin,Dhar Anindya Sundar

Publisher

Elsevier BV

Subject

General Engineering

Cited by 8 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Active Adaptive Composite Fault Tolerant Controller Design For Nonlinear Systems;Journal of Physics: Conference Series;2024-08-01

2. Low cost and high performance double‐node upset resilient latch for low orbit space applications;International Journal of Circuit Theory and Applications;2023-11-30

3. A Highly Robust and Low-Power Real-Time Double Node Upset Self-Healing Latch for Radiation-Prone Applications;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2021-12

4. A Self-Healing, High Performance and Low-Cost Radiation Hardened Latch Design;2021 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT);2021-10-06

5. Defect Tolerant Majority Voter Design Using Triple Transistor Redundancy;2019 IEEE International Symposium on Smart Electronic Systems (iSES) (Formerly iNiS);2019-12

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